Implementation of processor cores of a fault-tolerant control system on FPGA under external control

Abstract

The paper describes the choice of a technical solution for the implementation of a fault-tolerant real-time control system under external control. The main idea of the method is to introduce an external control block of the main control system that includes a watchdog and a backup decision-making algorithm. This block was supposed to be executed on an external FPGA-based block. The main system was supposed to be executed on the CPU. The paper proposes a variant of creating the entire system on a single FPGA. It implements both the processor cores for the operation of the main control system and control block. Various variants of cores for implementation on FPGA are considered. The paper studies suitable projects of processor cores for implementation on FPGA. It is concluded that the LEON series cores are suitable for the problem of building a fault-tolerant control system, since they already have technical solutions to improve fault tolerance. It is concluded that the proposed approach to building a fault-tolerant control system with external control can be fully implemented on a single FPGA. It has some advantages over implementation on separate blocks.