Abstract
Abstract In this brief a new modulo 2n+1 multiplier is proposed for IDEA block cipher. A total of (n+1) partial products including a constant correction term are added using tree of Carry save adder with end around complemented carry followed by modulo adder. Wallace tree multiplier is adopted in order to improve the accumulation of partial products. Proposed modulo multiplier is compared with the other modulo multipliers available in the literature for IDEA block cipher. The VLSI implementation of proposed multiplier utilizing carry save tree architecture achieves (30 to 35%) improvement in the delay whereas Wallace tree architecture achieves (32 to 41.5%).
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