Implementation of Energy Conserved VLSI System with Transducer System in Low Power Technology

Abstract

This paper describes about a various strategies, methodologies and power management techniques for low power circuits and systems of Field Programmable Gate Arrays (FPGAs) design. Future challenges of designs with low power and high performance are also discussed. The Event-driven architecture is generally done using the transducers. Here in this work to overcome the size and the operation relating to the energy conversion transducer is replaced with the sensors for doing the same work related to the transducer. For this purpose, the use of FPGA provides specific hardware technology it can also be reprogrammable thus providing a reconfigurable sensor system. Corresponding circuit can be modified to adapt its functionality to perform different tasks. The proposed work is designed in Cadence Virtuoso tool of 45nm and consumes the area of 31mm2 and has high throughput of 37.12.