Abstract
This paper presents the field programmable gate array (FPGA) implementation of the Advanced Encryption Standard (AES) with handshake protocol to resistant differential power analysis (DPA). DPA is a powerful side-channel analysis (SCA) attack. A SCA attack takes advantage of implementation specific characteristics to recover the secret parameters involved in the computation. We propose a DPA-resistant design method with handshake protocol to make the power traces misaligned. AES algorithm was implemented in Xilinx Spartan III-E FPGA device using the structure of handshake protocol. At last, an experiment platform was built to prove that the design has ability to resistant the differential power analysis.
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