Abstract

Ultrathin equivalent oxide thickness (EOT) scaling of TiN/Y2O3 /SiGe gate stacks using a trimethylaluminum (TMA) treatment was studied. In comparison to previously reported high-k/SiGe MOS interfaces utilizing various Ge contents, we obtained an EOT scaling down to 1 nm with ultralow interface trap densities ( $\text{D}_{\text {it}}$ ). In addition, the impact of EOT scaling on the SiGe MOS interface properties has been investigated. We found the stress-induced degradation at the SiGe interface from constant gate biasing can be suppressed by scaling the thickness of Y2O3.

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