Abstract
The gate-drain overlapped device (GOLD) structure is proposed to achieve high reliability and high performance in deep submicrometer MOSFETs. The GOLD device concept is different from that of drain-engineering methods such as the double-diffused drain (DDD) and lightly doped drain (LDD). GOLD eliminates the tradeoff between transconductance and breakdown voltage (hot-carrier, drain sustaining). The overlap effect of the GOLD devices is discussed using simulation and experiment. GOLD has a gate structure using a native oxide film (5-10 A) to obtain an overlapped fine structure. The process is also compatible with conventional LDD processes and is suitable for 0.3-0.5- mu m-design-rule devices at 5-V operation, and 3-V operation.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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