Impact of Switching Voltage on Complementary Steep-Slope Tunnel Field Effect Transistor Circuits

Abstract

Impacts of switching voltage of a bilayer tunneling field-effect transistor (TFET) with extremely small subthreshold swing on energy consumption in static and dynamic circuits are investigated in this study. The TFET circuit simulation under an operating voltage of 0.3 V is performed by the simulation program with integrated circuit emphasis (SPICE) into which electrical characteristics of the n- and p-channel bilayer TFETs calculated by device simulation are introduced. The static simulation of an inverter has clarified that the adjustment of the OFF-state voltage ( ${V}_{{ \mathrm{\scriptscriptstyle OFF}}}{)}$ , defined as a gate voltage at a drain current of $10^{{-{11}}}$ A/ $\mu \text{m}$ , to 0.08–0.14 V can be effective to suppress the short-circuit current. In contrast, when ${V}_{ \mathrm{\scriptscriptstyle OFF}}$ of the TFET is made close to 0 V according to the conventional manner of the ${V}_{ \mathrm{\scriptscriptstyle OFF}}$ adjustment, the energy consumption of the TFET inverter significantly increases because of the short-circuit leakage current. It is clarified from the dynamic simulation of a 11-stage ring oscillator (RO) that, as a result of this ${V}_{ \mathrm{\scriptscriptstyle OFF}}$ adjustment, the energy consumption of the TFET RO is comparable or even lower under high load capacitance than that of complementary metal–oxide–semiconductor (CMOS) RO, because of reduction in leakage current at a small expense of increase in the delay time. The present examination on ${V}_{ \mathrm{\scriptscriptstyle OFF}}$ adjustment can provide a new guideline of device design not only for TFETs but also for other steep-slope switching devices for future low-power internet-of-things (IoT) applications.