Impact of Source/Drain Si1-yCy Stressors on Silicon-on-Insulator N-type Metal–Oxide–Semiconductor Field-Effect Transistors

Abstract

The stress field in the channel of a silicon-on-insulator (SOI) N-type metal–oxide–semiconductor field-effect transistor (NMOSFET) with silicon–carbon alloy source and drain stressors was evaluated. The physical origin of the stress components in the transistor channel region was explained. The magnitude and distribution of the strain components, and their dependence on device design parameters such as the spacing between the silicon–carbon alloy stressors, the carbon mole fraction in the stressors and stressor recessed depth and raised height were investigated. The reduction in the stressor spacing or increase in the carbon mole fraction of the stressors and the stressor recessed depth and raised height increase the magnitude of the vertical compressive stress and the lateral tensile stress in the portion of the channel region where the inversion charge exists. This is beneficial for improving the electron mobility in NMOSFETs. A simple guiding principle for an optimum combination of the above-mentioned device design parameters and the trade-off between performance and junction leakage current degradation is discussed in this paper.