Impact of Key Deposition Parameters on the Voiding Sporadically Occurring in Solder Joints with Electroplated Copper

Abstract

In many electronic devices, a time-dependent degradation of the drop/impact reliability of solder joints with electrodeposited Cu has been an issue to date. This problem has been associated with a sporadic void formation in the interfacial intermetallic compound and has also been found to aggravate with the introduction of Pb-free solders. Recently, incorporation of impurities into the electroplated Cu layer has been demonstrated to promote the voiding in Cu/solder joints. The aim of this work is to quantitatively study the role of key Cu plating parameters in the impurity incorporation process. The reported experiments emphasize the impact of plating temperature on the voiding propensity of galvanostatically deposited Cu layers. Also, a comprehensive analysis combining the findings of this study and current–voltage results for Cu deposition at constant temperature establishes a clear correlation between overpotential changes driven by plating rate or temperature and trends in the voiding propensity of accordingly deposited Cu layers. Based on this correlation, the ranges of overpotentials where either “void-prone” or “void-free” Cu could be deposited are clearly identified in two acidic Cu plating solutions containing different additive combinations. The proposed analysis enables further prediction and control of the voiding in solder joints with electrodeposited Cu layers.