Abstract

We demonstrate the impact of semiconductor/oxide interface traps (ITs) on the DC and AC characteristics of tunnel field-effect transistors (TFETs). Using the Sentaurus simulation tools, we show the impacts of trap density distribution and trap type on the n-type double gate- (DG-) TFET. The results show that the donor-type and acceptor-type ITs have the great influence on DC characteristic at midgap. Donor-like and acceptor-like ITs have different mechanism of the turn-on characteristics. The flat band shift changes obviously and differently in the AC analysis, which results in contrast of peak shift of Miller capacitorCgdfor n-type TFETs with donor-like and acceptor-like ITs.

Highlights

  • Tunneling field-effect transistor (TFET) is one of low-power electronics due to lower off-current and steeper slope

  • We address a detailed investigation of the role of trap type, trap density, and trap energy levels on dependence of double gate- (DG-)TFET characteristics with HfO2 high-κ gate insulator

  • Peak position of traps is located between EV and Ec which results in degradation of Ion/Ioff ratio

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Summary

Introduction

Tunneling field-effect transistor (TFET) is one of low-power electronics due to lower off-current and steeper slope. The semiconductor/oxide interface quality is severely tested, and the existence of ITs could introduce instability It was not clear how interface traps (ITs) can influence TFET performance [11,12,13,14,15]. They did not explain influence machine of Miller capacitance and power dissipation Resolving this issue is important to better understand the device operation and to further research the impacts of interface traps on turn-on and capacitance characteristics of TFETs. In this paper, we address a detailed investigation of the role of trap type, trap density, and trap energy levels on dependence of DG-TFET characteristics with HfO2 high-κ gate insulator

Device Model and TCAD Simulation
Results and Discussion
FromMidBandGap
Conclusion

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