Impact of heavy ion irradiation on CMOS current mirrors based on SOI and bulk Si substrates: mismatch and output impedance

Abstract

The impact of a single event on the performance of CMOS current mirrors (CMs) is studied experimentally in this paper. Both basic and cascode CMs based on bulk Si and PDSOI substrates are employed to demonstrate the permanent effects of damage generated by heavy-ion strikes. The results show that the mismatch of the CMs (bulk Si/PDSOI basic/cascode CMs) changes after heavy-ion irradiation, which means that the accuracy of the output current may need re-evaluation when CMs are operated in a harsh environment. For output impedance, a drastic reduction of 40% is observed for small (W/L = 0.5 μm/0.25 μm) PDSOI basic CMs. This may limit the application of CMs when high output impedance is required to provide a large gain or common mode rejection ratio. Different types of performance degradation after heavy-ion irradiation are classified, and the characteristics are also statistically compared between different types of CM. The mechanisms of these changes are then discussed and traced back to the damage induced by the random heavy-ion strikes. These results demonstrate the permanent effects of damage generated by heavy-ion strikes in CMOS CMs, and provide insights into the impact of heavy-ion irradiation on analog circuits.