Abstract
We studied the impact of grain size distribution of poly-Si gate on PMOSFET performance. It was found from voltage capacitance characteristic that the smaller grain size causes boron concentration to be depleted at gate dielectric film interface. Moreover, grain size affects the ultra thin gate dielectric film too. Boron is more penetrated to ultra thin gate dielectric film as initial grain size gets larger. The penetrated boron degrades hole mobility at channel region in PMOSFET. It was found for the first time that highest PMOSFET performance can be obtained by optimizing the grain size of gate poly-Si, which strongly impacts on the hole mobility as well as the depletion of boron concentration at gate dielectric film interface.
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