Impact of Gaussian Doping Profile and Negative Capacitance Effect on Double-Gate Junctionless Transistors (DGJLTs)

Abstract

In this paper, we study the impact of vertical Gaussian doping (GD) profile and ferroelectric (FE) negative capacitance phenomenon on the performance of nanoscale double-gate junctionless (JL) transistor. The device characteristics have been obtained by using the baseline approach of combining Landau–Khalatnikov equation with TCAD simulations. Doped HfO2 has been incorporated as FE gate insulator and parameters such as coercive field ( ${E}_{c}$ ) and remanent polarization ( ${P}_{r}$ ) have been optimized to achieve nonhysteretic voltage amplification along with substantial gain. The impact of GD profile in the channel and FE gate insulator is examined by studying device characteristics for a wide range of projected range ( ${R}_{p}$ ), straggle ( $\sigma$ ), and peak doping ( ${N}_{\mathbf {pk}}$ ) values for optimized ${E}_{c}$ and ${P}_{r}$ . It has been demonstrated that the proposed device exhibits reduced leakage current, increase in ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}$ ratio by 4 orders, and approximately 2 times improvement in ${g}_{m}/{I}_{d}$ values compared to the conventional double-gate GD JL transistor. Furthermore, the proposed device exhibits reverse drain induced barrier lowering effect which leads to increase in barrier even in nanoscale regime.