Impact of gate tunneling leakage on the operation of NMOS transistors with ultra-thin gate oxides

Abstract

A detailed characterization of the gate and drain current characteristics has been carried out on NMOS transistors featuring ultra-thin gate oxides (1.2–2.3 nm). A quasi-analytical model of both gate and drain currents has been worked out and validated in ohmic and saturation regions. The impact of gate current on MOSFET operation has been shown to be critical for large area devices but of less importance for nominal devices, indicating that, down to 1.2 nm, the gate oxide thinning is not detrimental to the device functionality.