Abstract
We investigated the impact of etch angles on cell characteristics of 3D NAND flash memory structures. The cell characteristics were extracted from simulations with an empirical etch profile, which was analyzed through comparisons to completely vertical conditions. Here, we observed that a narrowing of the poly-silicon channel width due to etch angles increased the channel resistance, which resulted in an on-current degradation of approximately 19% for an etch angle of 89.2°. The degradation in cell characteristics also became worse as the number of word-lines changed from low to high levels. Additionally, the difference in channel hole size between upper and lower stage aggravated the cell uniformity along the channel, hence the threshold voltage distribution was broadening in the smaller etch angle.We confirmed that critical dimensions should be well-controlled to minimize the etch angles, which provide significant on-current reduction and program characteristics distortion. These results led to an appropriated standard to implement high stack 3D NAND flash memory.
Published Version
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