Abstract

AbstractNowadays, almost all electronic systems on printed circuit boards (PCB) adopt a vital element known as the power delivery network (PDN). However, the performance of the PDN is susceptible to variables such as the temperature and aging of its key constituents: the decoupling capacitors (decaps). Consequently, the long-term reliability of the PDN demands meticulous consideration to foresee how its performance can deviate from the initial design specifications. A realistic high-current server system is considered. It involves hundreds of decaps to achieve the required target impedance as optimally selected and laid out by the Power Integrity (PI) designer. The degradation of decap performance is analyzed by collecting experimental data from tens of decaps for each type used in the design while applying an accelerated aging process at different temperatures. The impact of aging in terms of the capacitance, parasitic inductance, and resistance of the decaps is considered to illustrate an innovative methodological design approach based on statistical analysis. Such a design approach can prevent the detrimental impact of a larger noise level due to the gradual performance degradation of the PDN over the intended life cycle of the system.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.