Abstract

As the 3D NAND technology developing toward more and more stack layers, it is essential to shrink the gate length (Lg) and inter-gate space (Ls). However, one of key concerns of scaling Lg/Ls 3D NAND flash is post-cycling data retention characteristics. The impact of cycling induced intercell trapped charge on two primary charge loss mechanisms (vertical and lateral charge loss) was studied in this work. According to experimental analysis and TCAD simulation, it is found that, in vertically scaled 3D NAND, the vertical charge loss is deteriorated not only by the cycling induced tunnel oxide degradation (introducing interface/oxide traps), but also by the cycling induced intercell trapped charge (enhancing word-lines edge electric field), on account of the enhanced Poole-Frenkel effect and tunneling effect. On the other hand, the cycling induced intercell trapped charge can also suppress lateral charge migration. Therefore, the vertical charge loss, rather than the lateral charge migration, still can be the dominant factor for post-cycling retention characteristics in scaling Lg/Ls 3D NAND flash memory.

Highlights

  • For the demand of higher bit density and lower bit cost, three-dimension (3D) NAND flash memory with vertical channel type cells has become the mainstream of nonvolatile memory technology [1], [2]

  • The impact of PE cycling on data retention mechanism of charge trap based 3D NAND is studied

  • In this work, the impact of PE cycling on data retention mechanism is investigated in charge trap based 3D NAND flash test chips

Read more

Summary

INTRODUCTION

For the demand of higher bit density and lower bit cost, three-dimension (3D) NAND flash memory with vertical channel type cells has become the mainstream of nonvolatile memory technology [1], [2]. The charge trapping layer of 3D NAND flash are continuous along the channel hole which can lead to additional charge loss due to lateral charge migration [4], [5]. It is important to clarify if lateral charge migration will turn much worse and figure out the dominant factor, vertical or lateral charge loss, in post-cycling retention characteristics of vertically scaled 3D NAND flash memory. The impact of PE cycling on data retention mechanism (vertical and lateral charge loss) of charge trap based 3D NAND is studied. In vertically scaled 3D NAND flash, besides the tunnel oxide degradation, the naturally accumulating intercell trapped charge during PE cycling can deteriorate vertical charge loss, and suppress lateral charge migration. The vertical charge loss is still the dominant factor in post-cycling retention characteristics

DEVICE AND EXPERIMENTS
RESULTS AND DISCUSSION
CONCLUSION
Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.