Abstract

The current study presents the interface-state and electrical properties of silicon (Si)-based metal-oxide-semiconductor (MOS) devices using copper-doped titanium dioxide (Cu:TiO2) nanoparticles for possible applications as an interfacial layer in scaled high-k/metal gate MOSFET technology. The structural properties of the Cu:TiO2 nanoparticles have been obtained by means of X-ray diffraction (XRD), UV–Vis–NIR spectrometry, atomic force microscopy, and scanning electron microscopy measurements; they were compared with pure TiO2 thin film. With the incorporation of Cu, rutile-dominated anatase/rutile multiphase crystalline was revealed by XRD analysis. To understand the nature of this structure, the electronic parameters controlling the device performance were calculated using current–voltage (I–V), capacitance–voltage (C–V), and conductance–voltage (G–V) measurements. The ideality factor (n) was 1.21 for the Al/Cu:TiO2/p-Si MOS device, while the barrier height ϕb was 0.75 eV with semi-log I–V characteristics. This is in good agreement with 0.78 eV measured by the Norde model. Possible reasons for the deviation of the ideality factor from unity have been addressed. From the C–V measurements, the values of diffusion potential, barrier height, and carrier concentration were extracted as 0.67, 0.98 eV, and 8.73 × 1013 cm−3, respectively. Our results encourage further work to develop process steps that would allow the Cu-doped TiO2 film/Si interface to play a major role in microelectronic applications.

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