Abstract
Polysilicon (poly-Si) grain size control is a critical issue with scaling of MOS transistors in integrated-circuit design, more so in embedded nonvolatile memory (NVM) technology. This paper investigates an approach to suppress poly-Si grain growth under a necessary additional thermal budget for 40-nm embedded NVM technology. Our studies reveal that carbon implant can suppress poly-Si grain size growth and that the implant dose rather than its energy plays a key role in controlling the grain size. Physical analysis using advanced planar transmission electron microscopy technique shows a reduction in the poly-Si grain size with an increasing carbon implant dose. The application of the carbon implant technique to sub-40 nm embedded NVM technology can therefore help to reduce SRAM ${V} _{{MIN}}$ -related failures significantly. In this paper, we present a complete process reliability case study to incorporate carbon implant as an effective solution for suppressing poly-Si grain growth, thereby eliminating the side effects of an additional thermal budget in advanced embedded NVM.
Published Version
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