Image encryption and decryption using exclusive-OR based on ternary value logic

Abstract

In this paper, the approximate current mode adder circuit was proposed using CNTFET technology based on ternary value logic. This design was evaluated relying on binary converters and HSPICE simulator and it used the standard 32 nm CNTFET technology. In addition, by using the HSPICE tool, the parameters such as power consumption, delay, PDP, and EDP were estimated. The simulation results were shown to reduce power consumption and delay, and improve PDP and EDP. Due to the importance of data security, the performance of the approximate current mode adder circuit using image encryption algorithms based on chaotic systems has been investigated by MATLAB software. Analysis of the approximate adder circuit performance in the image encryption was indicated an increase in system speed, security, and reduced power consumption. Simulation and encryption results indicate the supremacy of the proposed circuit compared to others.