Abstract

The III-V compound semiconductor-based quantum-well field-effect transistor (QWFET) is one of the most promising solid-state transistor technologies for future high-speed, low-power logic integrated circuit applications due to their high speed and low-voltage operation. This excellent speed and low voltage operation mainly comes from the unique properties of III-V compound semiconductors such as high electron and hole mobility, high electron velocity saturation and high sheet carrier concentration, etc. High-performance III-V compound semiconductor-based n-channel QWFETs are widely available. But, for implementing high-speed low-power CMOS logic integrated circuits, there is a critical issue of identifying high-performance III-V compound semiconductor -based p-channel quantum-well transistors. In order to fully utilize the potential of high mobility III-V compound semiconductor channel materials, instead of developing large diameter III-V wafers, it is better to couple III-V transistors with traditional silicon wafers. This chapter deals with the architecture and electrical performance of III-V nanoscale quantum-well field-effect transistors for future high-speed and low-power logic integrated circuit applications.

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