Abstract

There are other non-idealities that have not been modeled here. The gain of the fully differential op amp is dependent on its voltage output. The sampling switches inject charge non-linearly as a function of the input voltage. Both of these non-idealities create harmonic distortion in the modulator output. These have been left out of the model because they do not strongly determine the integrator power. The effect of switch resistance on settling has not been modeled, but including it may show that more op amp power is needed to compensate for the modest increase in the settling time constant. Conclusions This paper demonstrates that a behavioral model, which models charge sharing, slewing, settling, and total thermal noise, can be used to optimize the power of a SC integrator employing a single stage, class A op amp. Information gained from such an optimization can be used to decide whether a different modulator architecture or more complex op amp is needed, or it can be used determine the number of quantizer levels needed in a multibit modulator. Once the power has been optimized, the designer can use the optimization result as a baseline to design the integrator with real devices, discovering where additional power may be needed to accommodate other non-idealities that were not addressed.

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