Abstract
Time domain reflectometry (TDR) is applied to the failure analysis of through-silicon vias (TSVs). The reflection time of the TDR signal from test-element-group (TEG) chips with TSVs stacked on a silicon interposer is compared to the distance between the failure point and the contact pad derived from a TDR simulation value, using a model which has the same structure as the TEG chips. These results show good agreement between the simulated and the measured results.
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