Residual stress evaluation of flip-chip bonding with non-conductive films on organic substrate and silicon interposer by piezo-sensor embedded test element group chips

Abstract

The stress of integrated circuits caused by flip-chip bonding (FCB) is evaluated using piezo-sensor embedded test element group (TEG) chips. After non-conductive film (NCF) coating, the TEG chips are connected to the organic substrate and silicon interposer by FCB. The chip size is 9∗9 mm2 with 200μm in thickness. The stress inside the chip is obtained in each process of FCB by measuring the change in piezo-resistance. On the organic substrate, the compressive stress after bonding is high in the center of TEG chips and the stress becomes lower towards the corner. On the silicon interposer, the compressive stress is low compared to the organic substrate. The stress at elevated temperatures up to 120 °C is also measured. On the organic substrate, the compressive stress decreases with increasing temperature. For silicon interposer case, on the other hand, the stress is almost constant with temperature.