Abstract

Content-addressable memory (CAM) is a prominent hardware for high-speed lookup search, but consumes larger power. Traditional NOR and NAND match-line (ML) architectures suffer from a short circuit current path sharing and charge sharing respectively during precharge. The recently proposed precharge-free CAM suffers from high search delay and the subsequently proposed self-controlled precharge-free CAM suffers from high power consumption. This paper presents a hybrid self-controlled precharge-free (HSCPF) CAM architecture, which uses a novel charge control circuitry to reduce search delay as well as power consumption. The proposed and existing CAM ML architectures were developed using CMOS 45nm technology node with a supply voltage of 1 V. Simulation results show that the proposed HSCPF CAM-type ML design reduces power consumption and search delay effectively when compared to recent precharge-free CAM-type ML architectural designs.

Highlights

  • IntroductionWhen the word in a row is not matched with input search word even by one bit, the ML attached to that row will discharge through the pull-down path formed by the mismatched Content-addressable memory (CAM) cell

  • Content-addressable memory (CAM) compares stored lookup table data against search data parallel within a single clock cycle [1, 2] and returns the address of the matched data through match-line sense amplifier (MLSA)

  • The recently proposed precharge-free CAM suffers from high search delay and the subsequently proposed self-controlled precharge-free CAM suffers from high power consumption

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Summary

Introduction

When the word in a row is not matched with input search word even by one bit, the ML attached to that row will discharge through the pull-down path formed by the mismatched CAM cell. If all the bits in a row are matched with the input search word, logic 1 is transferred to N nodes of all the CAM cells and the ML attached to that word is connected to ground. If a word in a row is not matched with the input search word, logic 0 is transferred to node N of all mismatched CAM cells and the ML attached to that word starts to charge. Timing waveform of NAND CAM cell for match followed by miss

Short circuit current in NOR-type CAM
Precharge-free CAM architectures
D Dbar SL M8
Findings
Conclusion
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