Hybrid offset compensated latch-type sense amplifier for tri-gated FinFET technology

Abstract

In this paper, a novel offset compensated latch-type sense amplifier consisting of hybrid (current & voltage) sensing operation is proposed for SRAMs. The offset compensation circuitry of the proposed sense amplifier includes FET based capacitors and current injection circuitry (CIC) for compensation against VT mismatch of critical transistor pairs. The proposed amplifier does not cause extra overhead in SRAM access latency. The functionality of the proposed tri-gated FinFET sense amplifier in 20 nm technology is verified using 3D TCAD tool and its efficacy against VT variability is tested with the help of HSPICE simulations. Reliability and performance characteristics of the proposed sense amplifier are compared with recently reported capacitor-based offset compensated sense amplifier (OCSA) and the conventional current-latched sense amplifier (CLSA). The proposed sense amplifier achieves 7.58% and 26.38% higher yield compared to OCSA and CLSA, respectively. In this study, the VT mismatch in all critical transistor pairs of the sense amplifier was introduced simultaneously. The proposed amplifier outperforms OCSA and CLSA in the following: (i) 1.11 and 5.02 times higher offset tolerance, (ii) 1.66 and 2.66 times lower bit-line differential voltage (ΔVin) to achieve target yield of 90%, and (iii) 16.84% and 52.94% lower standard deviation in sensing delay during read-0 operation due to higher offset tolerance. Effect of VDD scaling on yield and performance of various sense amplifiers is also evaluated. Under iso-area condition, the proposed sense amplifier exhibits 17.10% higher yield and × 2.55 higher offset tolerance in comparison with CLSA.