Hybrid Dynamic CML with Modified Current Source (H-MDyCML): A Low-Power Dynamic MCML Style

Abstract

With the growing demands of portable devices, it is necessary to pay attention to low-power digital integrated designs. This paper proposes a low-power MOS Current Mode Logic (MCML) design, termed as Hybrid Dynamic Current Mode Logic with modified current source (H-MDyCML). In H-MDyCML circuits, the functions are realized using complementary pass transistor logic which helps to overcome the problem of stacking of transistors in multiple levels. The dynamic current source has also been modified from an NMOS transistor to a PMOS transistor-driven current source which leads to the elimination of the use of CMOS inverter. H-MDyCML circuits are compared with other existing designing styles: Dynamic CML (DyCML), Hybrid DyCML (H-DyCML), and DyCML with modified current source (Dy-CML-NP). The proposed design (H-MDyCML) shows an overall improvement (in terms of Power Delay Product (PDP)) up to 94.77% compared to DyCML, 52.17% compared to Dy-CML-NP, and 91.40% compared to H-DyCML, for single stage circuits.