Hybrid CMOS-RRAM True Random Number Generator Exploiting Coupled Entropy Sources

Abstract

Compact and reliable ON-chip true random number generators (TRNGs) are inevitable for generating secure cryptographic keys in resource constrained mobile Internet-of-Things (IoT) devices. To this end, in this work, we propose an extremely area-efficient hybrid CMOS-resistive random access memory (RRAM) TRNG exploiting coupled entropy sources: (a) temporal (cycle-to-cycle) and spatial (device-to-device) switching variability of filamentary RRAMs and (b) race condition of the set reset (SR)-latch. Such a coupled entropy source enhances the stochasticity of the generated random bits and eliminates the need for complex and energy-hungry postprocessing circuits. The raw output bits generated utilizing the proposed hybrid CMOS-RRAM TRNG passes all the standard statistical tests of the NIST SP800-22 test suite even in the presence of variations in the operating voltage and temperature. Our work may provide incentive for experimental realization of such lightweight hybrid CMOS-nonvolatile memories (NVM)-based TRNGs harnessing coupled entropy sources.