HW-SW Co-design

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Traditionally, system design used to be done by hardware group and software group independently. The functional specifications used to be intuitively broken into hardware and software, and implementation used to proceed. Once the system is integrated, major problems used to rise in system integration. The worst-case scenario with such problems may even lead to re-do the complete system design again. Cooperative approach for design of HW and SW systems is well recognized now. This chapter will concentrate on the use of co-design in the development of embedded systems. In theory, several models and partitioning algorithms have been developed. Several benefits occur while adapting co-design strategy for embedded systems, viz., (a) it forces the developers to look into the problem in a holistic way; (b) design life cycle is well defined without surprises; and (C) reduces integration and test time. Current trend of designing system-on-hip needs co-design principles. Hardware–software partitioning is the critical activity in co-design. Major architectural decisions on the processor around which the system has to be designed and its interface to the hardware are important. The system partitioning problem is to allocate the components into partitioned subsystems. The partitioning challenge has major constraints of system cost, performance, size of the system, and power. The HW-SW partitioning problem is the process of deciding whether the required functionality is more advantageously implemented in hardware or software. This is a multivariate optimization problem which is NP-hard. Section 10.6 discusses basic partitioning approaches, viz., structural, functional, hardware oriented, and software oriented. Section 10.7 discusses important partitioning algorithms, viz., integer programming, hierarchical clustering, greedy partitioning, ratio cut, simulated annealing, and Kernighan-Lin algorithm. These are classified into constructive and iterative methods. In practice, a combination of constructive and iterative algorithms is often employed. To summarize, Chap. 3 is the basis for co-design where we studied exhaustively system-level modeling. Once a system is hierarchically broken into subsystems, modeled and analyzed, each subsystem’s functionality has to be transformed into architecture for implementation. It can be a hardware component like a processor, CDFG, GPU, etc. or a software module. A computation, modeled with fine grain parallelism, can be used both to develop software and to synthesize circuits.