Abstract

In the assembly process of high reliability printed wiring boards (PWBs), rework cycles seem to be an unfortunate fact of life. The question repeatedly arises as to how many times a solder joint incorporating plated‐through‐holes (PTHs) can be reworked without degrading the configuration. By performing a controlled experiment, the authors were able to answer that question and make recommendations as to the limits that should be placed on the number of reworks. They were further able to look at the following factors: operators, board type, number of layers and solder temperature to determine which were the most significant in determining limits to the number of rework cycles. The results showed that the more layers the board contained, the more at risk the PTH was to rework‐induced defects. This perhaps defies conventional wisdom that the board type or temperatures were the driving contributors. The increased number of board layers corresponds to thinner dielectric layers. The experimental results were repeated in a theoretical review using a finite element analysis (FEA) model that was developed showing the thermally induced stresses in the solder joint and PTH region. For multilayer boards, it is recommended that rework be limited to three cycles. The present work shows that there is evidence of degradation by the fifth cycle on boards with thinner dielectric (10‐layer board, dielectric thickness 0.008 in.). By limiting the number of reworks, the risk of inducing failure mechanisms into PWAs (printed wiring assemblies) is dramatically reduced.

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