Abstract
Degradation induced by hot-carrier stress (HCS) in a Multi-STI-Finger (MF) LDMOS is analyzed through both electrical measurements and TCAD simulations. The critical HCS issues have been first addressed on a conventional STI-based LDMOS. Then, the detrimental effect of extended Si/SiO2 interfaces along the silicon fingers in the MF-LDMOS has been widely investigated with particular focus on its dependence on biases, ambient temperature, and layout variations. Experimental results are analyzed and discussed on the basis of numerical simulations. The application of a time-dependent HCS degradation model is successfully proved for the first time on the conventional and MF-LDMOS devices at different stress biases and ambient temperatures.
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