Hole mobility enhancement in strained nanocrystalline architecture of group IV semiconductors

Abstract

Effective hole mobility enhancements of 300% at room temperature, compared to fully relaxed all-Ge layers, are demonstrated by employing an innovative design of Boron-doped Si0.25Ge0.75 strained nanocrystalline architecture (SNA), which are prepared by sputtering deposition incorporating with rapid thermal annealing (RTA) processes. The resultant SNA with a nanocrystalline Ge buffer layer enables us not only to fully exert the global strain but also to maintain a low-density defects and high hole concentration, thus breaking a trade-off between the hole mobility and concentration. Ultimately, a record hole mobility of 1911 cm2 V−1s−1 at a high hole concentration of 1.2 × 1018 cm−3 under room temperature is obtained in group IV semiconductors. The present SNA provides an excellent platform for high-speed applications based on group IV semiconductor.