Hole Effective Mass of Strained Ge1-X Sn x Alloys P-Channel Quantum-Well MOSFETs on (001), (110), and (111) Ge Substrates

Abstract

- The dependence of effective mass on Sn content, pseudomorphic strain, cap layer thickness, and substrate orientation is theoretically studied for Ge-cap/Ge1-x Sn x /Ge substrate p-channel MOSFETs through six-band k·p method. The Luttinger-like and deformation potential parameters were obtained from the fit of Ge1-x Sn x band structures by the empirical pseudopotential method (EPM). The valence band alignment is theoretically determined by the EPM and the model-solid theory. The high Sn content and thin Ge-cap layer both result the small conductivity mass along <110> of the first subband. Introduction Sn incorporating into Ge makes Ge1-x Sn x alloys as a direct band gap material that is good for nFETs.[1] For Ge1-x Sn x p-channel, several works show the high hole mobility on Ge (001)[2], (110)[3], and (111)[4] substrates. The strain effect to reduce the conductivity mass (m c) might be the main factor for the mobility enhancement.[5] However, there are few theoretical reports to address the dependence. In addition, few works discuss the m c on the Ge1-x Sn x quantum well (QW) heterostructures. In this work, the m c of Ge-cap/Ge1-x Sn x QW/Ge substrate FETs dependent with different Sn content, strain, cap thickness, and substrate orientations is theoretically studied. Models The dependence of valence band structures near the Γ point and effective mass of Ge1-x Sn x alloys along [100], [110], and [111] on Sn content and pseudomorphic strain on (001), (110), and (111) substrates are calculated by the six-band k·p model with the fitted Luttinger-like and deformation potential parameters derived from the band structure calculated by EPM[1]. Note that the fit of band structure of spin-orbital is ingnored for better fit of the other two valence bands. The EPM claculated valence band strucutres (solid line) of relxed Ge (Fig. 1(a)) and Ge0.9Sn0.1 (Fig. 1(b)) and strained Ge (Fig. 1(c)) and Ge0.9Sn0.1 (Fig. 1(d)) under (110) in-plane biaxial compressive strain of -1 % (ε|| = -1%) are compared to the band strucutres calculated by six-band k·p model (dash line). To simulate the p-channel inversion layer of Ge-cap/10 nm Ge1-x Sn x QW layer on (001), (110), and (111) Ge substrates, the six-band k·p model was used in the self-consistently calculations of Poisson and Schrödinger equations.[6] The valence band alignment of the heterostructure is theoretically determined by the EPM and the model-solid theory[7]. The inverse of m c along channel direction <110> of 1stsubband will be calculated as Ref. [6]. Results and Discussions Fig. 2(a) shows the calculated valence band diagram of 1st subband hole distribution of Ge-cap/Ge0.9Sn0.1 QW on Ge (001) substrate at N inv = 5×1012 cm-2 with cap of 4 nm and 2 nm. For the cap of 4 nm, the 1st subband energy (E 1st ) cross the cap and QW layers results the ~30% and ~70% carriers of 1st subband located at cap and QW layer, respectively. Note that the Fermi level energy is set as 0 eV. For the cap of 2 nm, there is only ~10% carriers located at cap and ~90% at QW layer. Fig. 2(b) shows the confined 2D energy contours of the 1st subband of Ge0.9Sn0.1 QW for cap of 4 nm (solid line) and 2 nm (dashed line). The larger of cap of 2 nm than that of 4 nm shows the small m c of Ge-cap/Ge0.9Sn0.1QW/Ge (001) with thin cap layer. For the Sn content up to 15 % (Fig. 2(c)), there is only ~9% and ~5% carriers located at cap layer for cap of 4 nm and 2 nm, respectively, due to the increasing valence band offset by increasing Sn content. The comparable of cap of 2 nm and 4 nm are presented in Fig. 2(d). Conclusion The m c of Ge-cap/Ge1-x Sn x /Ge substrates are theoretically studied through six-band k·p method calibrated by EPM. The m c of 1st subband is composed of the m c of the cap and QW layers due to the small valence band offset with low Sn content. High Sn content and thin cap layer keep the carriers of 1st subband located in the QW layer to result small m c. Reference [1] H.-S. Lan and C. W. Liu, Appl. Phys. Lett., 104, p. 192101, 2014. [2] Dian Lei et al., J. Appl. Phys., 119, p. 024502, 2016. [3] Chunlei Zhan et al., in Symp. VLSI Technol., Dig. Tech. Pap., 2012. [4] Yan Liu et al., Semicond. Sci. Technol., 29, p. 115027, 2014. [5] Suyog Gupta et al., I EEE Electron Device Lett., 34(7), p. 831, 2013. [6] H.-S. Lan et al., ECS Transactions, 50, p. 151-155, 2013. [7] Chris G. Van de Walle, Phys. Rev. B, 39, p. 1871, 1989. Figure 1