Abstract

Hash Function in cryptography algorithms is used to encrypt the message by giving the appropriate output based on the structure of the hash function itself. This algorithm is important for security applications such as Keyed-Hash Message Authentication Code (HMAC), digital signature, and others. There are different types of hash functions such as MD5, SHA-1, RIPEMD-160, SHA-256, SHA-224, SHA-384, SHA-512, and others. In this paper, the unfolding transformation method was proposed to improve the throughput of the SHA-256 hash function. Three types of SHA-256 hash function were designed namely SHA-256 design, SHA-256 design inner pipelining with unfolding factor 2, and SHA-256 design inner pipelining with unfolding factor 4. The designs were written in Verilog code and the output simulations were verified using ModelSim. The simulation results showed that the proposed SHA-256 inner pipelining unfolding with factor 4 provided the highest throughput which is 4196.30 Mbps, and factor 2 was superior in terms of maximum frequency and was better than the conventional SHA-256 design. Type of Paper: other. Keywords: Cryptography algorithm; FPGA; SHA-256 Hash Function; Unfolding transformation, Verilog

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