High-temperature reverse bias characteristics of highly reliable GaN MOS-HFET

Abstract

We previously proposed a GaN MOS-HFET that practically reduces the maximum electric field strength in the MOS gate to one-third under high voltage reverse bias because a JFET is placed between the MOS gate and the drain electrode. We report here that this structure significantly improves high-temperature reverse bias (HTRB) characteristics in reverse bias retention compared to our conventional GaN MOS-HFET. The proposed GaN MOS-HFET with a saturation current of more than 60 A achieved excellent HTRB characteristics with a rated voltage of 650 V at 150 °C for 1000 h, in addition to a low on-resistance of 110 mΩ and good switching characteristics of rise time (Tr)/fall time (Tf) of 5.1/6.5 ns.