High-speed differential interconnection design for flip-chip BGA packages

Abstract

With the advancement of semiconductor technologies, packaging interconnect becomes one of the bottlenecks in high-performance devices. The paper deals with high-speed differential interconnect commonly used in the flip-chip ball grid array (Fc-BGA) packages. Layout issues for differential interconnect are first discussed, and the emphasis is put on the investigation on the effects of the discontinuity consisting of via and solder ball on electrical performance. Overall electrical performance of one typical differential pair is characterized and -15dB return loss and -23dB isolation between neighboring pairs are achieved up to 10 GHz. The purposes of this paper are to design and optimize high-speed series differential interconnects used in Fc-BGA packages with the first-round success.