Abstract
High-speed data acquisition and communication systems require fast multiplexing and demultiplexing of data. We are developing novel multiplexer/demultiplexer circuits using a dual-rail approach. A single cell of the demultiplexer is a toggle type B flip-flop. The demultiplexer operates at 95 GHz and its performance does not depend on the demultiplexing ratio. The dual-rail technique avoids racing between data and clock signals. The multiplexer circuit is based on RS type B flip-flops and works up to 60 GHz. The circuits are implemented in HYPRES' standard Nb process with a critical current density of 1.0 KA/cm/sup 2/.
Full Text 
Sign-in/Register to access full text options
Sign-in/Register to access full text options 
Published version (
Free)
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
