High-Purity Digitally Intensive Frequency Synthesis Exploiting Millimeter-Wave Harmonics

Abstract

This thesis focuses on improving the phase noise and power efficiency of millimeter-wave (mm-wave) frequency synthesizers in nanometer CMOS. The mm-wave frequency spectrum is widely adopted in various upcoming volume commercial wireless applications. These new applications provide more interconnection between the physical and digital worlds. It entails a demand for high speed data communications and accurate object sensing, which are enabled by the large bandwidth available at mm-wave frequencies. These systems also require good signal-to-noise ratio (SNR) on mm-wave transceivers. It sets stringent phase noise specifications on the mm-wave frequency synthesizers. On the other hand, the power budget on the mm-wave frequency synthesizers are limited for long battery lifetime and/or thermal reliability. The low phase noise should be achieved at high power efficiency. Advanced nanometer CMOS technologies are preferred for the integration of mm-wave frequency synthesizers. The scaled transistor size favors the cointegration with baseband circuits and large-scale SoCs. The upgrowing speed of the MOSFETs also extends the upper limits on the operating frequency of the CMOS circuits. On the other hand, the performance of mm-wave frequency synthesizers suffers from various constraints and imperfections in nanometer CMOS technologies. For example, the mm-wave oscillators is inferior in phase noise due to the low quality-factor LC tank and exacerbated flicker noise upconversion. Mm-wave frequency dividers/multipliers are power hungry and limit the power efficiency of the frequency synthesizers. There is a clear gap in performance between mm-wave and RF frequency synthesizers.