High-Mobility, Low-Voltage Programmable/Erasable Ferroelectric Polymer Transistor Nonvolatile Memory Based on a P(VDF-TrFE)/PMMA Bilayer Gate Insulator

Abstract

Low mobility and high operating voltages are bottlenecks in the practical application of ferroelectric organic field-effect transistor (Fe-OFET) nonvolatile memory (NVM). In this article, we demonstrate a high-mobility polymer semiconductor-based Fe-OFET NVM that can well operate at low programming/erasing voltages ( V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">P</sub> /V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">E</sub> ). The issue that hinders the reduction of the V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">P</sub> /V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">E</sub> in Fe-OFET NVMs is discussed. We develop a route to resolve the issue by building a thin bilayer gate insulator consisted of an ultrathin poly(methyl methacrylate) (PMMA) and a thin poly(vinylidenefluoride-trifluoroethylene) films. The processing compatibility, that is, the tri-layered core architecture consisting of polymer semiconductor and insulator films is prepared by a full-solution technology, is confirmed. The mechanism of the performance improvements by using the ultrathin PMMA in the Fe-OFET NVMs is investigated. As a result, the Fe-OFET NVM exhibits excellent performances at low V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">P</sub> /V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">E</sub> of ±15 V, with a high mobility up to 1.75 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs, reliable memory endurance over 400 cycles, and stable memory retention over 65000 s.