Abstract
We discuss the design and demonstration of highly efficient 1.55 µm hybrid III-V/Silicon semiconductor optical amplifiers (SOA). The optimized III-V wafer stack consists of Al(0.10)In(0.71)Ga(0.18)As multiple quantum wells (MQW) and Al(0.48)In(0.52)As electron stop layers to realize SOAs with high wall-plug efficiency (WPE). We present various designs and experimentally determine WPE values for 2 mW and 0.1 mW input power amplification. The 400 µm long flared SOA achieved the highest WPE value of 12.1% for output power > 10mW and the 400 µm long straight SOA achieved the highest WPE value of 7.3% for output power < 10mW. These are the highest WPE values ever obtained for 1.55 µm SOAs.
Highlights
There has been extensive research in realizing large-scale integration of silicon (Si) photonics for long-haul communications, high-throughput optical interconnects, and future high performance computing (HPC) [1,2,3,4,5,6]
The authors from Ghent University have reported a hybrid semiconductor optical amplifiers (SOA) based on BCB bonding, wall-plug efficiency (WPE) values could not be determined because device resistance values were not reported [10]
We demonstrate hybrid SOAs with III-V/Si tapers capable of achieving a WPE = 12.1% for 2 mW input power
Summary
There has been extensive research in realizing large-scale integration of silicon (Si) photonics for long-haul communications, high-throughput optical interconnects, and future high performance computing (HPC) [1,2,3,4,5,6]. Recent advances in key components such as high-contrast, low-loss arrayed waveguide gratings/routers (AWG/AWGR) [6, 7], athermal silicon ring modulators [8], germanium photo-detectors [9], hybrid SOAs [10,11,12], and single-wavelength hybrid laser sources [13, 14] have all paved a path towards realizing large chip-scale optical systems with various functionalities. We demonstrate hybrid SOAs with III-V/Si tapers capable of achieving a WPE = 12.1% for 2 mW input power. The majority of this work discusses device fabrication and measurements respectively in section 3 and 4 respectively
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