Highly Accurate and Energy Efficient Binary-Stochastic Multipliers for Fault-Tolerant Applications

Abstract

Stochastic circuits use randomly distributed bitstreams to represent numbers, so leading to small areas and low power dissipation. However, it does not only result in a long latency and thus increases energy, but also reduces computing accuracy. In this brief, a design of parallel stochastic multipliers with high accuracy and low energy is proposed. To this end, an algorithm for finding optimal multiplicative bitstreams (OpMulbs) is developed for multipliers. Experimental results show that the proposed parallel multipliers using OpMulbs are the most accurate among currently available stochastic multipliers. They also require much less energy with a smaller latency, compared to the others. With a mean squared error of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4.02{\times } 10^{-6}$ </tex-math></inline-formula> , the proposed 8-bit multiplier shows a 42.18%, 48.15%, 20.35%, and 55.56% reduction in area, power, latency, and energy, respectively, compared to an 8-bit exact binary multiplier. The applications in multiply-accumulate units and image processing algorithms show that the proposed multipliers outperform the state-of-the-art stochastic designs in several considered criteria and binary designs in hardware cost.