High-level Synthesized Hardware of Fundamental Morphological Operation and its Application

Abstract

The important factor to get large market share for embedded image processing product is to create high-performance and low-power image processing systems. To develop such systems, hardware implementation of image processing is required instead of software implementation. Denoising in image processing plays an important role in automated automobile driving and the development of high-performance robots and so on. Morphological operation, it is one of the effective tools in denoising. In this study, we aim to develop an embedded image processing system with better performance by processing morphological operation in hardware using High-Level Synthesis, HLS. The HLS is a technology converting software programs into hardware programs. We propose a program describing method using a buffer to make HLS generate hardware-aware programs for morphological operation. As a result, hardware achieved improved power efficiency compared to the software running on a personal computer and an embedded CPU.