High-efficiency CMOS power amplifier with a folded proportional combining structure and adaptive power mode control

Haigang Wu,Yang Liu,Zhaohui Wu,Bin Li,Yuanbo Ma

doi:10.1109/edssc.2018.8487171

High-efficiency CMOS power amplifier with a folded proportional combining structure and adaptive power mode control

Haigang Wu, Yang Liu + Show 3 more

https://doi.org/10.1109/edssc.2018.8487171

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Publication Date: Jun 1, 2018

Citations: 1

Affiliation: South China University of Technology

#Power Back Off #High-efficiency CMOS Power Amplifier + Show 8 more

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Abstract

A novel folded proportional series combining transformer used for linear power amplifier (PA) is proposed in this paper. The power delivery efficiency is significantly enhanced, especially at power back off region. Using a standard $0.18- \mu \mathrm {m}$ CMOS process, a fully integrated dual-channel PA was designed. With adaptive channel control, the PA can achieve a wide power adjustment range and better efficiency at power back off, which is suitable for high peak-average power ratio (PAPR) modulation applications.

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