Optimized Doherty power amplifier with a new offset line

Abstract

This work proposes a new offset line of carrier PA for Doherty power amplifier (PA). The carrier PA of conventional Doherty PA (DPA) delivers lower efficiency at back-off output power than at peak output power due to the phase mismatch of the carrier offset line in implementation, because the efficiency at back-off power is very sensitive to the output impedance change. To solve the problem, a new offset line for the carrier PA is adopted optimizing the efficiency performance at back-off output power, while it maintains the output peak power. A Doherty PA with the concept is designed using 45 W gallium nitride (GaN) high electron mobility transistors (HEMT) for the carrier and peaking cells at 1.94 GHz. The measured average output power, drain/power-added efficiencies and gain are 43.6 dBm, 60.7/56.9%, and 12 dB for a 10MHz long term evolution (LTE) signal with a 6.5 dB peak-to-average power ratio (PAPR).