High-Voltage and High-Current Id–Vds Measurement Method for Power Transistors Improved by Reducing Self-Heating

Yohei Nakamura,Hiroyuki Sakairi,Naotaka Kuroda,Ken Nakahara,Tatsuya Yanagi

doi:10.1109/led.2020.2974492

Abstract

In this letter, an improved measurement method for power transistors is proposed to obtain drain-current characteristics as a function of drain-source voltage ( ${I}_{\text {d}}$ – ${V}_{\text {ds}}$ ) in high-voltage and high-current (HVHC) ranges. A simple double pulse test (DPT) is utilized in our previous method. However, the self-heating of the device under test (DUT) is not ignorable in the range of high ${I}_{\text {d}}$ . The improved test circuit is equipped with an additional transistor connected in parallel to DUT in order to prevent the flow of a large current into DUT before the measurement. When a trench-gate type SiC MOSFET (Metal-Oxide-Semiconductor Field-Effect-Transistor) is used as a DUT, the power loss of the DUT decreases by about 80%. The transient thermal analysis shows that the die temperature rise is suppressed by up to 10 °C in about 200 A ranges. The newly obtained ${I}_{\text {d}}$ – ${V}_{\text {ds}}$ characteristics are utilized to model the SiC trench MOSFET. The device model reproduces the measured switching waveforms very accurately.

Highlights

S ILICON carbide (SiC) metal-oxide-semiconductor fieldeffect transistors (MOSFETs) have attracted great attention as promising devices for developing the power electronics technology due to their excellent properties [1]–[3].the high-speed switching capability of an SiC MOSFET increases the possibility of miniaturizing the power electronics systems [4]
The high-voltage and high-current (HVHC) Id–Vds measurement inevitably causes power loss (Ploss) and self-heating of a device under test (DUT), and the switching-based measurements based on the double pulse test (DPT) have been proposed to solve this problem [12]–[15]
With the aim to solve the self-heating problem of our previous method proposed in [13], [14], in this letter, we propose a modified DPT where the Ploss of a DUT is reduced

Summary

INTRODUCTION

S ILICON carbide (SiC) metal-oxide-semiconductor fieldeffect transistors (MOSFETs) have attracted great attention as promising devices for developing the power electronics technology due to their excellent properties [1]–[3]. As the authors of this letter previously claimed in [14], the drain-current drain-voltage (Id–Vds) characteristic of a device under test (DUT) in high-voltage. The HVHC Id–Vds measurement inevitably causes power loss (Ploss) and self-heating of a DUT, and the switching-based measurements based on the double pulse test (DPT) have been proposed to solve this problem [12]–[15]. Reducing self-heating is essential for accurately measuring the HVHC Id–Vds characteristics of the power transistors whose rated currents and/or voltages are greater than those of the previously studied SiC MOSFETs [12]–[15]. With the aim to solve the self-heating problem of our previous method proposed in [13], [14], in this letter, we propose a modified DPT where the Ploss of a DUT is reduced. The SiC trench MOSFET is modeled by using both conventional and new HVHC Id–Vds results, and the new model reproduces the measured switching waveforms more accurately than the conventional model

PROPOSED MEASUREMENT METHOD

RESULTS AND DISCUSSION

CONCLUSION