Abstract
A new process technology for 4H-SiC planar power MOSFETs based on a boron diffusion step to improve the SiO2 /silicon carbide interface quality is presented in this paper. Large area (up to 25 mm2) power MOSFETs of three voltages ratings (1.7, 3.3, and 4.5 kV) have been fabricated showing significant improvements in terms of inversion channel mobility and on-resistance in comparison with counterparts without boron oxide treatment. Experimental results show a remarkable increase of the channel mobility, which raises the device current capability, especially at room temperature. When operating at high temperature, the impact of the high channel mobility due to boron treatment on electrical forward characteristics is reduced as the drift layer resistance starts to dominate in the total on-state resistance. In addition, the third quadrant characteristics approximate to those of an ideal PiN diode, and the device blocking capability is not compromised by the use of boron for the gate oxide formation. The experimental performance in a simple dc/dc converter is also presented.
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