Abstract

Superconductor digital integrated circuits (ICs) require rapid evaluation of multiple copies to obtain statistical operational data. These data are used for assessing model-to-hardware correlation and facilitate iterative IC design development. The Integrated Cryogenic Electronics Testbed (ICE-T) is a cryogen-free test platform, which can test multiple chips simultaneously with similar convenience to a liquid-helium immersion probe and with cooldown times of between 3.3 to 4.5 hours. We have developed a three-chip insert to increase the volume of chip testing and demonstrated simultaneous cooling of six chips with two such inserts. We report the test statistics collected from 27 chips across a single wafer. We have also used the ICE-T’s convenient temperature control system to evaluate chips in the 3.5 - 6 K range. Such evaluation determines the robustness of circuit design and its tolerance to critical current fluctuations due to fabrication variation.

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