High strain embedded-SiGe via low temperature reduced pressure chemical vapor deposition

Abstract

Performance improvement of strained p-type metal oxide semiconductor field effect transistors (p-MOSFETs) via embedded SiGe (e-SiGe) is well established. Strain scaling of p-MOSFETs since 90nm complementary metal oxide semiconductor node has been accomplished by increasing Ge content in e-SiGe from nominally <20% in 90nm p-MOSFETs to >35% Ge in 32nm p-MOSFETs. Further strain enhancement for 22nm and beyond p-MOSFETs is required due to disproportionate reduction in device area per generation caused by non-scaled gate length. Relaxation of SiGe with >35% Ge during epitaxial growth and subsequent processing is a major concern. Specifically low temperature growth is required to achieve meta-stable pseudomorphic SiGe film with high Ge%. Currently, selective SiGe epitaxial film in reduced pressure chemical vapor deposition (RPCVD) epitaxy is grown with conventional Si gas precursors and co-flow etch using HCl at temperatures higher than 625°C. At temperatures lower than 625°C in RPCVD epitaxy, however, HCl has negligible etch capability making selectivity difficult to achieve during epitaxial growth. Hence, cyclic deposit and etch epitaxial growth in conjunction with a low temperature etching chemistry is desirable to achieve selectivity at temperatures lower than 625°C. In this paper, we apply the above concept to achieve selective growth of high strain SiGe (>35%) at 500°C on test patterns corresponding to 65nm node. SiGe is grown non-selectively first at 500°C with high order of silane as Si source, and Germane as Ge source followed by an etching chemistry also at 500°C to achieve selectivity. In addition, the growth rate of SiGe epitaxial film and the Ge concentration in the deposited epitaxial film were studied as a function of Si precursor flow; the effect of HCl introduction on Ge concentration and film growth rate was discussed.