Abstract
We present a high-speed differential clocked voltage switch logic inverter operating at ultra-low supply voltages (ULV). Simulated data for the new gate are presented and compared to modified clocked voltage switch logic (CVSL). Preliminary measurements for ULV gates are presented. The increase in speed for supply voltages below 300 mV for the ULV gate presented is between 10 and 20 times compared to modified CVSL logic.
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