High Speed Bipolar ICs Using Super Self-Aligned Process Technology

Abstract

We have developed a new bipolar process technology, called SST. The emitter region, base p region, base p+ region, base p+ polysilicon electrode and emitter contact window of NPN transistor are formed by one mask photolithography process. The transistor active regions are all self-aligned. Therefore, small-size transistors can be realized and high performance is achieved by the decreased collector-base junction capacitance. A new bipolar integrated circuit using SST gave a 63 ps/gate propagation delay time and 0.043 pJ/gate speed-power product.